Minimization of reversible adder circuits

Islam, Saiful and Islam, Md. Rafiqul 2005, Minimization of reversible adder circuits, Asian journal of information technology, vol. 4, no. 12, pp. 1146-1151.

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Title Minimization of reversible adder circuits
Author(s) Islam, Saiful
Islam, Md. Rafiqul
Journal name Asian journal of information technology
Volume number 4
Issue number 12
Start page 1146
End page 1151
Publisher Medwell Online
Place of publication Faisalabad, Pakistan
Publication date 2005
ISSN 1682-3915
1993-5994
Keyword(s) reversible logic
garbages
quantum costs
full adder and carry skip logic
Summary Losing information causes losing power. Information is lost when the input vector cannot be uniquely recovered from the output vector of a combinational circuit. The input vector of reversible circuit can be uniquely recovered from the output vector. In this study we have emphasized on the design of reversible adder circuits that is efficient in terms of gate count, garbage outputs and quantum cost and that can be technologically mapped. It has been analyzed and demonstrated that the results of our proposed adder circuits shows better performance compared to similar type of existing designs. Technology independent equations required to evaluate these circuits have also been given.
Language eng
Field of Research 090699 Electrical and Electronic Engineering not elsewhere classified
Socio Economic Objective 970109
HERDC Research category C1.1 Refereed article in a scholarly journal
Copyright notice ©2005, Medwell Online
Persistent URL http://hdl.handle.net/10536/DRO/DU:30009225

Document type: Journal Article
Collection: School of Information Technology
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