Fast fault tree analysis for hybrid uncertainties using stochastic logic implemented on field-programmable gate arrays: an application in quantitative assessment and mitigation of welding defects risk

Shoar, Shabab, Zarandi, Hamid R, Nasirzadeh, Farnad and Cheshmikhani, Elham 2017, Fast fault tree analysis for hybrid uncertainties using stochastic logic implemented on field-programmable gate arrays: an application in quantitative assessment and mitigation of welding defects risk, Quality and reliability engineering international, vol. 33, no. 7, pp. 1367-1385, doi: 10.1002/qre.2110.

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Title Fast fault tree analysis for hybrid uncertainties using stochastic logic implemented on field-programmable gate arrays: an application in quantitative assessment and mitigation of welding defects risk
Author(s) Shoar, Shabab
Zarandi, Hamid R
Nasirzadeh, Farnad
Cheshmikhani, Elham
Journal name Quality and reliability engineering international
Volume number 33
Issue number 7
Start page 1367
End page 1385
Total pages 19
Publisher John Wiley & Sons
Place of publication Chichester, Eng.
Publication date 2017-11
ISSN 0748-8017
Keyword(s) FTA
objective uncertainty
subjective uncertainty
quantitative risk assessment
stochastic logic
field programmable gate arrays
Language eng
DOI 10.1002/qre.2110
HERDC Research category C1.1 Refereed article in a scholarly journal
ERA Research output type C Journal article
Copyright notice ©2016, John Wiley & Sons, Ltd.
Persistent URL http://hdl.handle.net/10536/DRO/DU:30106487

Document type: Journal Article
Collection: School of Architecture and Built Environment
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