Polycrystalline transistor with multiple thresholds

Kabir, Hussain Mohammed Dipu and Chan, Mansun 2019, Polycrystalline transistor with multiple thresholds, Microelectronics journal, vol. 83, pp. 126-130, doi: 10.1016/j.mejo.2018.12.002.

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Title Polycrystalline transistor with multiple thresholds
Author(s) Kabir, Hussain Mohammed DipuORCID iD for Kabir, Hussain Mohammed Dipu orcid.org/0000-0002-3395-1772
Chan, Mansun
Journal name Microelectronics journal
Volume number 83
Start page 126
End page 130
Total pages 5
Publisher Elsevier
Place of publication Amsterdam, The Netherlands
Publication date 2019-01
ISSN 0026-2692
Keyword(s) Polycrystalline semiconductor
Mobility variation
Threshold voltage variation
Grains
Grain boundary
Display FETs
Threshold voltage
TFT
Language eng
DOI 10.1016/j.mejo.2018.12.002
Field of Research 0906 Electrical and Electronic Engineering
HERDC Research category C1 Refereed article in a scholarly journal
Copyright notice ©2018, Elsevier Ltd.
Persistent URL http://hdl.handle.net/10536/DRO/DU:30120582

Document type: Journal Article
Collections: Centre for Intelligent Systems Research
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