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Effect of Underlap with Fixed Gate Length: GaN-Based Double-Gate MOSFETs

Version 2 2024-06-06, 08:39
Version 1 2023-10-23, 23:42
conference contribution
posted on 2024-06-06, 08:39 authored by MR Hasan, MR Islam, TM Bhuiyan, Muhib Ashraf Nibir, ME Hasan, T Hossain
© 2021 IEEE. The effect of gate length 8 nm with underlap of double-gate MOSFET has been designed for VLSI Technology. The evaluation process was followed by NEGF (non-equilibrium Green's function) formalism using SILVACO ATLAS followed to ITRS-2013. The investigations on the threshold voltage, Subthreshold Slope, ION, I_{OFF}, I_{ON}/I_{OFF}, DIBL, and switching characteristics of the electric field have been done with the simulation results. In the simulation, adopting symmetrical distances from the source to gate and gate to drain (S-G and G-D) by fixing the gate length identical are cited as underlap. Here, the observation has been done for LUN =(0 to 4 nm) underlap length. GaN and HfO2 have been chosen as channel material and dielectric material, respectively. The Proposed device structure indicates that GaN-based DG-MOSFETs for L_{G}=S nm with various underlap lengths is a promising candidate for the aspect of modern VLSI applications.

History

Pagination

53-56

Location

Dhaka, Bangladesh

Start date

2021-01-05

End date

2021-01-07

ISBN-13

9780738130408

Title of proceedings

ICREST 2021 - 2nd International Conference on Robotics, Electrical and Signal Processing Techniques

Event

ICREST

Publisher

IEEE

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