Methodology for Optimizing Gain and Noise Figure Performance of CMOS LNAs at 60GHz and beyond

Yeo, S-B; Brinkhoff, J; Lin, F; Xu, YP

Methodology for Optimizing Gain and Noise Figure Performance of CMOS LNAs at 60GHz and beyond

https://hdl.handle.net/10536/DRO/DU:30086718
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conference contribution

posted on 2024-06-06, 11:20 authored by S-B Yeo, J Brinkhoff, F Lin, YP Xu

Methodology for Optimizing Gain and Noise Figure Performance of CMOS LNAs at 60GHz and beyond

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DOI - Is version of https://doi.org/10.1109/RFIT.2009.5383709

Location

Singapore, SINGAPORE

Language

English

Author URL

http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000276343800060&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=a045e4b2bb1f2b747c68c720ec8913b7

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EN.1 Other conference paper

Pagination

241-244

Start date

2009-12-09

End date

2009-12-11

ISBN-13

978-1-4244-5030-5

Title of proceedings

2009 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY: SYNERGY OF RF AND IC TECHNOLOGIES, PROCEEDINGS

Event

IEEE International Symposium on Radio-Frequency Integration Technology

Publisher

IEEE

Place of publication

Piscataway, N.J.

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Keywords

Science & Technology Technology Engineering, Electrical & Electronic Telecommunications Engineering CMOS digital integrated circuits gain LNA noise measurement

Methodology for Optimizing Gain and Noise Figure Performance of CMOS LNAs at 60GHz and beyond

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