A CPS framework based perturbation constrained buffer planning approach in VLSI design
Version 2 2024-06-06, 01:57Version 2 2024-06-06, 01:57
Version 1 2017-03-23, 15:34Version 1 2017-03-23, 15:34
journal contribution
posted on 2024-06-06, 01:57 authored by X Chen, X Huang, Y Xiang, D Zhang, R Ranjan, C LiaoA CPS framework based perturbation constrained buffer planning approach in VLSI design
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Journal
Journal of parallel and distributed computingVolume
103Season
Special issue: scalable cyber-physical systemsPagination
3-10Location
Amsterdam, The NetherlandsPublisher DOI
ISSN
0743-7315eISSN
1096-0848Language
engPublication classification
C Journal article, C1 Refereed article in a scholarly journalCopyright notice
2016, ElsevierPublisher
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