A CPS framework based perturbation constrained buffer planning approach in VLSI design

Chen, X; Huang, X; Xiang, Y; Zhang, D; Ranjan, R; Liao, C

A CPS framework based perturbation constrained buffer planning approach in VLSI design

journal contribution

posted on 2024-06-06, 01:57 authored by X Chen, X Huang, Y Xiang, D Zhang, R Ranjan, C Liao

A CPS framework based perturbation constrained buffer planning approach in VLSI design

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DOI - Is version of https://doi.org/10.1016/j.jpdc.2016.11.013

Location

Amsterdam, The Netherlands

Language

eng

Publication classification

C Journal article, C1 Refereed article in a scholarly journal

Copyright notice

2016, Elsevier

Journal

Journal of parallel and distributed computing

Volume

103

Season

Special issue: scalable cyber-physical systems

Pagination

3-10

ISSN

0743-7315

eISSN

1096-0848

Publisher

Elsevier

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Keywords

buffer insertion buffer planning perturbation integer linear programming parallel computing School of Information Technology 4606 Distributed computing and systems software 4699 Other information and computing sciences

A CPS framework based perturbation constrained buffer planning approach in VLSI design

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