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Design and optimization of LNA topologies with image rejection filters
journal contribution
posted on 2010-05-01, 00:00 authored by A Golmakani, K Mafinejad, Abbas KouzaniAbbas KouzaniAn important problem in designing RFIC in CMOS technology is the parasitic elements of passive and active devices that complicate design calculations. This article presents three LNA topologies including cascode, folded cascade, and differential cascode and then introduces image rejection filters for low-side and high-side injection. Then, a new method for design and optimization of the circuits based on a Pareto-based multiobjective genetic algorithm is proposed. A set of optimum device values and dimensions that best match design specifications are obtained. The optimization method is layout aware, parasitic aware, and simulation based. Circuit simulations are carried out based on TSMC 0.18 um CMOS technology by using Hspice.
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Journal
International journal of RF and microwave computer-aided engineeringVolume
20Issue
3Pagination
286 - 297Publisher
John Wiley & SonsLocation
Hoboken, N.J.Publisher DOI
ISSN
1096-4290eISSN
1099-047XLanguage
engPublication classification
C1 Refereed article in a scholarly journalCopyright notice
2010, John Wiley & SonsUsage metrics
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