Spatio-Temporal Feature Maps Using Gated Neuronal Architecture

Chandrasekaran, V, Palaniswami, M and Caelli, Terry M 1995, Spatio-Temporal Feature Maps Using Gated Neuronal Architecture, IEEE Transactions on Neural Networks, vol. 6, no. 5, pp. 1119-1131, doi: 10.1109/72.410356.

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Title Spatio-Temporal Feature Maps Using Gated Neuronal Architecture
Author(s) Chandrasekaran, V
Palaniswami, M
Caelli, Terry MORCID iD for Caelli, Terry M orcid.org/0000-0001-9281-2556
Journal name IEEE Transactions on Neural Networks
Volume number 6
Issue number 5
Start page 1119
End page 1131
Total pages 13
Publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Place of publication United States
Publication date 1995-01-01
ISSN 1045-9227
1941-0093
Keyword(s) Science & Technology
Technology
Computer Science, Artificial Intelligence
Computer Science, Hardware & Architecture
Computer Science, Theory & Methods
Engineering, Electrical & Electronic
Computer Science
Engineering
SEGMENTATION
Language eng
DOI 10.1109/72.410356
Indigenous content off
HERDC Research category C1.1 Refereed article in a scholarly journal
Persistent URL http://hdl.handle.net/10536/DRO/DU:30138543

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